Adjustes Target to ESP32S3 and made uart payload build static
This commit is contained in:
parent
73d3e24786
commit
2bc6686d90
@ -1,7 +1,7 @@
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#ifndef CLIENT_HANDLER_H
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#ifndef CLIENT_HANDLER_H
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#define CLIENT_HANDLER_H
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#define CLIENT_HANDLER_H
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#include "portmacro.h"
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#include "freertos/FreeRTOS.h"
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#include <stdbool.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <stdint.h>
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85
main/main.c
85
main/main.c
@ -12,10 +12,8 @@
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#include "message_parser.h"
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#include "message_parser.h"
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#include "nvs_flash.h"
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#include "nvs_flash.h"
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#include "glob.h"
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#include "communication_handler.h"
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#include "communication_handler.h"
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#include "main.h"
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#include "main.h"
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#include "portmacro.h"
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#include "uart_handler.h"
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#include "uart_handler.h"
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#include <stdbool.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include <stddef.h>
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@ -25,26 +23,18 @@
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#include "message_builder.h"
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#include "message_builder.h"
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typedef struct {
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QueueHandle_t message_queue;
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uint8_t *send_buffer;
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size_t send_buffer_size;
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} MessageBrokerTaskParams_t;
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static const char *TAG = "ALOX - MAIN";
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static const char *TAG = "ALOX - MAIN";
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static const uint16_t version = 0x0001;
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static const uint16_t version = 0x0001;
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static uint8_t send_message_buffer[1024];
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static uint8_t send_message_buffer[1024];
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static uint8_t send_message_payload_buffer[512 - 4];
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static MessageBrokerTaskParams_t broker_task_params;
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static MessageBrokerTaskParams_t broker_task_params;
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ClientList clientList = {.Clients = {{0}}, .ClientCount = 0};
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ClientList clientList = {.Clients = {{0}}, .ClientCount = 0};
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typedef void (*RegisterTaskCallback)(uint8_t msgid, const uint8_t *payload,
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size_t payload_len, uint8_t *send_buffer,
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size_t send_buffer_size);
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void echoCallback(uint8_t msgid, const uint8_t *payload, size_t payload_len,
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void echoCallback(uint8_t msgid, const uint8_t *payload, size_t payload_len,
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uint8_t *send_payload_buffer, size_t send_payload_buffer_size,
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uint8_t *send_buffer, size_t send_buffer_size) {
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uint8_t *send_buffer, size_t send_buffer_size) {
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// Code für den Button-Press
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ESP_LOGI(TAG, "Echo command 0x01...");
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ESP_LOGI(TAG, "Echo command 0x01...");
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int len =
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int len =
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build_message(0x01, payload, payload_len, send_buffer, send_buffer_size);
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build_message(0x01, payload, payload_len, send_buffer, send_buffer_size);
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@ -60,18 +50,25 @@ void echoCallback(uint8_t msgid, const uint8_t *payload, size_t payload_len,
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}
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}
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void versionCallback(uint8_t msgid, const uint8_t *payload, size_t payload_len,
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void versionCallback(uint8_t msgid, const uint8_t *payload, size_t payload_len,
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uint8_t *send_buffer, size_t send_buffer_size) {
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uint8_t *send_payload_buffer,
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// Code für den Button-Press
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size_t send_payload_buffer_size, uint8_t *send_buffer,
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size_t send_buffer_size) {
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ESP_LOGI(TAG, "Version command 0x02...");
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ESP_LOGI(TAG, "Version command 0x02...");
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size_t git_build_hash_len = strlen(BUILD_GIT_HASH);
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size_t git_build_hash_len = strlen(BUILD_GIT_HASH);
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size_t needed_buffer_size = 2 + git_build_hash_len;
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uint8_t send_payload[2 + git_build_hash_len];
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if (send_payload_buffer_size < needed_buffer_size) {
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send_payload[0] = (uint8_t)(version & 0xFF);
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ESP_LOGE(TAG, "send_payload_buffer to small size %d need %d",
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send_payload[1] = (uint8_t)((version >> 8) & 0xFF);
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send_payload_buffer_size, needed_buffer_size);
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memcpy(&send_payload[2], &BUILD_GIT_HASH, git_build_hash_len);
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return;
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}
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int len = build_message(0x02, send_payload, sizeof(send_payload), send_buffer,
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send_payload_buffer[0] = (uint8_t)(version & 0xFF);
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send_buffer_size);
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send_payload_buffer[1] = (uint8_t)((version >> 8) & 0xFF);
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memcpy(&send_payload_buffer[2], &BUILD_GIT_HASH, git_build_hash_len);
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int len = build_message(0x02, send_payload_buffer, needed_buffer_size,
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send_buffer, send_buffer_size);
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if (len < 0) {
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if (len < 0) {
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ESP_LOGE(TAG,
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ESP_LOGE(TAG,
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"Error Building UART Message: payload_len, %d, sendbuffer_size: "
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"Error Building UART Message: payload_len, %d, sendbuffer_size: "
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@ -83,19 +80,20 @@ void versionCallback(uint8_t msgid, const uint8_t *payload, size_t payload_len,
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}
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}
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void clientInfoCallback(uint8_t msgid, const uint8_t *payload,
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void clientInfoCallback(uint8_t msgid, const uint8_t *payload,
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size_t payload_len, uint8_t *send_buffer,
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size_t payload_len, uint8_t *send_payload_buffer,
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size_t send_payload_buffer_size, uint8_t *send_buffer,
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size_t send_buffer_size) {
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size_t send_buffer_size) {
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ESP_LOGI(TAG, "Client Info Command 0x03...");
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ESP_LOGI(TAG, "Client Info Command 0x03...");
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static uint8_t entryLength = 17;
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static uint8_t entryLength = 17;
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uint8_t needed_buffer_size = 1 + entryLength * clientList.ClientCount;
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ESP_LOGE(TAG, "clientList.ClientCount = %d", clientList.ClientCount);
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if (send_payload_buffer_size < needed_buffer_size) {
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ESP_LOGE(TAG, "send_payload_buffer to small size %d need %d",
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send_payload_buffer_size, needed_buffer_size);
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return;
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}
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uint8_t payload_size = 1 + entryLength * clientList.ClientCount;
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send_payload_buffer[0] = clientList.ClientCount;
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ESP_LOGE(TAG, "payload_size = %d", payload_size);
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uint8_t send_payload[payload_size];
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send_payload[0] = clientList.ClientCount;
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uint8_t offsetMult = 0;
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uint8_t offsetMult = 0;
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uint8_t used_slots = 0;
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uint8_t used_slots = 0;
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@ -104,7 +102,6 @@ void clientInfoCallback(uint8_t msgid, const uint8_t *payload,
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used_slots++;
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used_slots++;
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}
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}
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}
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}
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ESP_LOGE("SPECIAL", "USED SLOTS: %d", used_slots);
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uint8_t loop_sanity_counter = 0;
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uint8_t loop_sanity_counter = 0;
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@ -112,30 +109,33 @@ void clientInfoCallback(uint8_t msgid, const uint8_t *payload,
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if (clientList.Clients[i].slotIsUsed) {
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if (clientList.Clients[i].slotIsUsed) {
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loop_sanity_counter++;
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loop_sanity_counter++;
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if (loop_sanity_counter > clientList.ClientCount) {
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if (loop_sanity_counter > clientList.ClientCount) {
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ESP_LOGE("SPECIAL", "DAS KANN NICHT SEIN");
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ESP_LOGE("SPECIAL",
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ESP_LOGE("SPECIAL", "loop_santy_count: %d, client_count: %d", loop_sanity_counter, clientList.ClientCount);
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"ERROR SANITY CHECK FAILED: loop_sanity_count: %d, "
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"client_count: %d",
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loop_sanity_counter, clientList.ClientCount);
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}
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}
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size_t offset = 1 + (entryLength * offsetMult++);
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size_t offset = 1 + (entryLength * offsetMult++);
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ESP_LOGE("SPECIAL", "OFFSET %d", offset);
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ESP_LOGE("SPECIAL", "OFFSET %d", offset);
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send_payload[offset] = i;
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send_payload_buffer[offset] = i;
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send_payload[offset + 1] = clientList.Clients[i].isAvailable;
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send_payload_buffer[offset + 1] = clientList.Clients[i].isAvailable;
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send_payload[offset + 2] = clientList.Clients[i].slotIsUsed;
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send_payload_buffer[offset + 2] = clientList.Clients[i].slotIsUsed;
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memcpy(&send_payload[offset + 3], clientList.Clients[i].macAddr,
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memcpy(&send_payload_buffer[offset + 3], clientList.Clients[i].macAddr,
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MAC_LENGTH);
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MAC_LENGTH);
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memcpy(&send_payload[offset + 9], &clientList.Clients[i].lastPing, 4);
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memcpy(&send_payload_buffer[offset + 9], &clientList.Clients[i].lastPing,
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memcpy(&send_payload[offset + 13],
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4);
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memcpy(&send_payload_buffer[offset + 13],
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&clientList.Clients[i].lastSuccessfullPing, 4);
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&clientList.Clients[i].lastSuccessfullPing, 4);
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}
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}
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}
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}
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int len = build_message(0x04, send_payload, sizeof(send_payload), send_buffer,
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int len = build_message(0x04, send_payload_buffer, needed_buffer_size,
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send_buffer_size);
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send_buffer, send_buffer_size);
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if (len < 0) {
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if (len < 0) {
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ESP_LOGE(TAG,
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ESP_LOGE(TAG,
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"Error Building UART Message: payload_len, %d, sendbuffer_size: "
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"Error Building UART Message: payload_len, %d, sendbuffer_size: "
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"%d, mes_len(error): %d",
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"%d, mes_len(error): %d",
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payload_len, send_buffer_size, len);
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needed_buffer_size, send_buffer_size, len);
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return;
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return;
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}
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}
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uart_write_bytes(MASTER_UART, send_buffer, len);
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uart_write_bytes(MASTER_UART, send_buffer, len);
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@ -203,6 +203,9 @@ void app_main(void) {
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broker_task_params.message_queue = parsed_message_queue;
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broker_task_params.message_queue = parsed_message_queue;
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broker_task_params.send_buffer = send_message_buffer;
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broker_task_params.send_buffer = send_message_buffer;
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broker_task_params.send_buffer_size = sizeof(send_message_buffer);
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broker_task_params.send_buffer_size = sizeof(send_message_buffer);
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broker_task_params.payload_buffer = send_message_payload_buffer;
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broker_task_params.payload_buffer_size =
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sizeof(send_message_payload_buffer);
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xTaskCreate(MessageBrokerTask, "message_handler_task", 4096,
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xTaskCreate(MessageBrokerTask, "message_handler_task", 4096,
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(void *)&broker_task_params, 5, NULL);
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(void *)&broker_task_params, 5, NULL);
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@ -14,6 +14,6 @@
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#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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#define MASTER_MODE_PIN GPIO_NUM_0 // Jumper-Erkennungspin
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#define MASTER_MODE_PIN GPIO_NUM_1 // Jumper-Erkennungspin
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#endif
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#endif
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@ -6,12 +6,6 @@
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static struct MessageBroker mr;
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static struct MessageBroker mr;
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static char *TAG = "ALOX - Message Handler";
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static char *TAG = "ALOX - Message Handler";
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typedef struct {
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QueueHandle_t message_queue;
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uint8_t *send_buffer;
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size_t send_buffer_size;
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} MessageBrokerTaskParams_t;
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void InitMessageBroker() {
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void InitMessageBroker() {
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mr.num_direct_callbacks = 0;
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mr.num_direct_callbacks = 0;
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mr.num_task_callbacks = 0;
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mr.num_task_callbacks = 0;
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@ -40,6 +34,8 @@ void MessageBrokerTask(void *param) {
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QueueHandle_t msg_queue = task_params->message_queue;
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QueueHandle_t msg_queue = task_params->message_queue;
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uint8_t *send_message_buffer = task_params->send_buffer;
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uint8_t *send_message_buffer = task_params->send_buffer;
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size_t send_message_buffer_size = task_params->send_buffer_size;
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size_t send_message_buffer_size = task_params->send_buffer_size;
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uint8_t *send_payload_buffer = task_params->payload_buffer;
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size_t send_payload_buffer_size = task_params->payload_buffer_size;
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if (msg_queue == NULL) {
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if (msg_queue == NULL) {
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ESP_LOGE(TAG, "Message queue not initialized. Terminating task.");
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ESP_LOGE(TAG, "Message queue not initialized. Terminating task.");
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@ -57,6 +53,7 @@ void MessageBrokerTask(void *param) {
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if (mr.FunctionList[i].MSGID == received_msg.msgid) {
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if (mr.FunctionList[i].MSGID == received_msg.msgid) {
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mr.FunctionList[i].callback(
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mr.FunctionList[i].callback(
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received_msg.msgid, received_msg.data, received_msg.payload_len,
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received_msg.msgid, received_msg.data, received_msg.payload_len,
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send_payload_buffer, send_payload_buffer_size,
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send_message_buffer, send_message_buffer_size);
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send_message_buffer, send_message_buffer_size);
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}
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}
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}
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}
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@ -5,12 +5,26 @@
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#include <stddef.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <stdint.h>
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typedef struct {
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QueueHandle_t message_queue;
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uint8_t *send_buffer;
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size_t send_buffer_size;
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uint8_t *payload_buffer;
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size_t payload_buffer_size;
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} MessageBrokerTaskParams_t;
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typedef void (*RegisterFunctionCallback)(uint8_t msgid, const uint8_t *payload,
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typedef void (*RegisterFunctionCallback)(uint8_t msgid, const uint8_t *payload,
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size_t payload_len,
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size_t payload_len,
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uint8_t *send_payload_buffer,
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size_t send_payload_buffer_size,
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uint8_t *send_buffer,
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uint8_t *send_buffer,
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size_t send_buffer_size);
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size_t send_buffer_size);
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typedef void (*RegisterTaskCallback)(uint8_t msgid, const uint8_t *payload,
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typedef void (*RegisterTaskCallback)(uint8_t msgid, const uint8_t *payload,
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size_t payload_len, uint8_t *send_buffer,
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size_t payload_len,
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uint8_t *send_payload_buffer,
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size_t send_payload_buffer_size,
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uint8_t *send_buffer,
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size_t send_buffer_size);
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size_t send_buffer_size);
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struct RegisterdFunction {
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struct RegisterdFunction {
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@ -7,8 +7,8 @@
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#include <stdint.h>
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#include <stdint.h>
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#define MASTER_UART UART_NUM_1
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#define MASTER_UART UART_NUM_1
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#define TXD_PIN (GPIO_NUM_1)
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#define TXD_PIN (GPIO_NUM_2)
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#define RXD_PIN (GPIO_NUM_2)
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#define RXD_PIN (GPIO_NUM_3)
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#define BUF_SIZE (256)
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#define BUF_SIZE (256)
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532
sdkconfig.old
532
sdkconfig.old
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# Espressif IoT Development Framework (ESP-IDF) 5.5.0 Project Configuration
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# Espressif IoT Development Framework (ESP-IDF) 5.5.0 Project Configuration
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#
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#
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CONFIG_SOC_ADC_SUPPORTED=y
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CONFIG_SOC_ADC_SUPPORTED=y
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CONFIG_SOC_DEDICATED_GPIO_SUPPORTED=y
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CONFIG_SOC_UART_SUPPORTED=y
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CONFIG_SOC_UART_SUPPORTED=y
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CONFIG_SOC_PCNT_SUPPORTED=y
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CONFIG_SOC_PHY_SUPPORTED=y
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CONFIG_SOC_WIFI_SUPPORTED=y
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CONFIG_SOC_TWAI_SUPPORTED=y
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CONFIG_SOC_GDMA_SUPPORTED=y
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CONFIG_SOC_GDMA_SUPPORTED=y
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CONFIG_SOC_AHB_GDMA_SUPPORTED=y
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CONFIG_SOC_AHB_GDMA_SUPPORTED=y
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CONFIG_SOC_GPTIMER_SUPPORTED=y
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CONFIG_SOC_GPTIMER_SUPPORTED=y
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CONFIG_SOC_TWAI_SUPPORTED=y
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CONFIG_SOC_LCDCAM_SUPPORTED=y
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CONFIG_SOC_LCDCAM_I80_LCD_SUPPORTED=y
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CONFIG_SOC_LCDCAM_RGB_LCD_SUPPORTED=y
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CONFIG_SOC_MCPWM_SUPPORTED=y
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CONFIG_SOC_DEDICATED_GPIO_SUPPORTED=y
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CONFIG_SOC_CACHE_SUPPORT_WRAP=y
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CONFIG_SOC_ULP_SUPPORTED=y
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CONFIG_SOC_ULP_FSM_SUPPORTED=y
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CONFIG_SOC_RISCV_COPROC_SUPPORTED=y
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CONFIG_SOC_BT_SUPPORTED=y
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CONFIG_SOC_BT_SUPPORTED=y
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CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED=y
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CONFIG_SOC_USB_OTG_SUPPORTED=y
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CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED=y
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CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED=y
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CONFIG_SOC_TEMP_SENSOR_SUPPORTED=y
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CONFIG_SOC_CCOMP_TIMER_SUPPORTED=y
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CONFIG_SOC_XT_WDT_SUPPORTED=y
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CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED=y
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CONFIG_SOC_PHY_SUPPORTED=y
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CONFIG_SOC_WIFI_SUPPORTED=y
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CONFIG_SOC_SUPPORTS_SECURE_DL_MODE=y
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CONFIG_SOC_SUPPORTS_SECURE_DL_MODE=y
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CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD=y
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CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD=y
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CONFIG_SOC_EFUSE_HAS_EFUSE_RST_BUG=y
|
|
||||||
CONFIG_SOC_EFUSE_SUPPORTED=y
|
CONFIG_SOC_EFUSE_SUPPORTED=y
|
||||||
|
CONFIG_SOC_SDMMC_HOST_SUPPORTED=y
|
||||||
CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y
|
CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y
|
||||||
|
CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED=y
|
||||||
CONFIG_SOC_RTC_MEM_SUPPORTED=y
|
CONFIG_SOC_RTC_MEM_SUPPORTED=y
|
||||||
|
CONFIG_SOC_PSRAM_DMA_CAPABLE=y
|
||||||
|
CONFIG_SOC_XT_WDT_SUPPORTED=y
|
||||||
CONFIG_SOC_I2S_SUPPORTED=y
|
CONFIG_SOC_I2S_SUPPORTED=y
|
||||||
CONFIG_SOC_RMT_SUPPORTED=y
|
CONFIG_SOC_RMT_SUPPORTED=y
|
||||||
CONFIG_SOC_SDM_SUPPORTED=y
|
CONFIG_SOC_SDM_SUPPORTED=y
|
||||||
@ -30,6 +42,7 @@ CONFIG_SOC_LEDC_SUPPORTED=y
|
|||||||
CONFIG_SOC_I2C_SUPPORTED=y
|
CONFIG_SOC_I2C_SUPPORTED=y
|
||||||
CONFIG_SOC_SYSTIMER_SUPPORTED=y
|
CONFIG_SOC_SYSTIMER_SUPPORTED=y
|
||||||
CONFIG_SOC_SUPPORT_COEXISTENCE=y
|
CONFIG_SOC_SUPPORT_COEXISTENCE=y
|
||||||
|
CONFIG_SOC_TEMP_SENSOR_SUPPORTED=y
|
||||||
CONFIG_SOC_AES_SUPPORTED=y
|
CONFIG_SOC_AES_SUPPORTED=y
|
||||||
CONFIG_SOC_MPI_SUPPORTED=y
|
CONFIG_SOC_MPI_SUPPORTED=y
|
||||||
CONFIG_SOC_SHA_SUPPORTED=y
|
CONFIG_SOC_SHA_SUPPORTED=y
|
||||||
@ -38,9 +51,10 @@ CONFIG_SOC_DIG_SIGN_SUPPORTED=y
|
|||||||
CONFIG_SOC_FLASH_ENC_SUPPORTED=y
|
CONFIG_SOC_FLASH_ENC_SUPPORTED=y
|
||||||
CONFIG_SOC_SECURE_BOOT_SUPPORTED=y
|
CONFIG_SOC_SECURE_BOOT_SUPPORTED=y
|
||||||
CONFIG_SOC_MEMPROT_SUPPORTED=y
|
CONFIG_SOC_MEMPROT_SUPPORTED=y
|
||||||
|
CONFIG_SOC_TOUCH_SENSOR_SUPPORTED=y
|
||||||
CONFIG_SOC_BOD_SUPPORTED=y
|
CONFIG_SOC_BOD_SUPPORTED=y
|
||||||
CONFIG_SOC_CLK_TREE_SUPPORTED=y
|
CONFIG_SOC_CLK_TREE_SUPPORTED=y
|
||||||
CONFIG_SOC_ASSIST_DEBUG_SUPPORTED=y
|
CONFIG_SOC_MPU_SUPPORTED=y
|
||||||
CONFIG_SOC_WDT_SUPPORTED=y
|
CONFIG_SOC_WDT_SUPPORTED=y
|
||||||
CONFIG_SOC_SPI_FLASH_SUPPORTED=y
|
CONFIG_SOC_SPI_FLASH_SUPPORTED=y
|
||||||
CONFIG_SOC_RNG_SUPPORTED=y
|
CONFIG_SOC_RNG_SUPPORTED=y
|
||||||
@ -48,21 +62,20 @@ CONFIG_SOC_LIGHT_SLEEP_SUPPORTED=y
|
|||||||
CONFIG_SOC_DEEP_SLEEP_SUPPORTED=y
|
CONFIG_SOC_DEEP_SLEEP_SUPPORTED=y
|
||||||
CONFIG_SOC_LP_PERIPH_SHARE_INTERRUPT=y
|
CONFIG_SOC_LP_PERIPH_SHARE_INTERRUPT=y
|
||||||
CONFIG_SOC_PM_SUPPORTED=y
|
CONFIG_SOC_PM_SUPPORTED=y
|
||||||
|
CONFIG_SOC_SIMD_INSTRUCTION_SUPPORTED=y
|
||||||
CONFIG_SOC_XTAL_SUPPORT_40M=y
|
CONFIG_SOC_XTAL_SUPPORT_40M=y
|
||||||
CONFIG_SOC_AES_SUPPORT_DMA=y
|
CONFIG_SOC_APPCPU_HAS_CLOCK_GATING_BUG=y
|
||||||
CONFIG_SOC_AES_GDMA=y
|
CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y
|
||||||
CONFIG_SOC_AES_SUPPORT_AES_128=y
|
|
||||||
CONFIG_SOC_AES_SUPPORT_AES_256=y
|
|
||||||
CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y
|
CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y
|
||||||
CONFIG_SOC_ADC_ARBITER_SUPPORTED=y
|
CONFIG_SOC_ADC_ARBITER_SUPPORTED=y
|
||||||
CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED=y
|
CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED=y
|
||||||
CONFIG_SOC_ADC_MONITOR_SUPPORTED=y
|
CONFIG_SOC_ADC_MONITOR_SUPPORTED=y
|
||||||
CONFIG_SOC_ADC_DMA_SUPPORTED=y
|
CONFIG_SOC_ADC_DMA_SUPPORTED=y
|
||||||
CONFIG_SOC_ADC_PERIPH_NUM=2
|
CONFIG_SOC_ADC_PERIPH_NUM=2
|
||||||
CONFIG_SOC_ADC_MAX_CHANNEL_NUM=5
|
CONFIG_SOC_ADC_MAX_CHANNEL_NUM=10
|
||||||
CONFIG_SOC_ADC_ATTEN_NUM=4
|
CONFIG_SOC_ADC_ATTEN_NUM=4
|
||||||
CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=1
|
CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=2
|
||||||
CONFIG_SOC_ADC_PATT_LEN_MAX=8
|
CONFIG_SOC_ADC_PATT_LEN_MAX=24
|
||||||
CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=12
|
CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=12
|
||||||
CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12
|
CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12
|
||||||
CONFIG_SOC_ADC_DIGI_RESULT_BYTES=4
|
CONFIG_SOC_ADC_DIGI_RESULT_BYTES=4
|
||||||
@ -78,40 +91,43 @@ CONFIG_SOC_ADC_SELF_HW_CALI_SUPPORTED=y
|
|||||||
CONFIG_SOC_ADC_SHARED_POWER=y
|
CONFIG_SOC_ADC_SHARED_POWER=y
|
||||||
CONFIG_SOC_APB_BACKUP_DMA=y
|
CONFIG_SOC_APB_BACKUP_DMA=y
|
||||||
CONFIG_SOC_BROWNOUT_RESET_SUPPORTED=y
|
CONFIG_SOC_BROWNOUT_RESET_SUPPORTED=y
|
||||||
CONFIG_SOC_SHARED_IDCACHE_SUPPORTED=y
|
CONFIG_SOC_CACHE_WRITEBACK_SUPPORTED=y
|
||||||
CONFIG_SOC_CACHE_MEMORY_IBANK_SIZE=0x4000
|
CONFIG_SOC_CACHE_FREEZE_SUPPORTED=y
|
||||||
CONFIG_SOC_CPU_CORES_NUM=1
|
CONFIG_SOC_CACHE_ACS_INVALID_STATE_ON_PANIC=y
|
||||||
|
CONFIG_SOC_CPU_CORES_NUM=2
|
||||||
CONFIG_SOC_CPU_INTR_NUM=32
|
CONFIG_SOC_CPU_INTR_NUM=32
|
||||||
CONFIG_SOC_CPU_HAS_FLEXIBLE_INTC=y
|
CONFIG_SOC_CPU_HAS_FPU=y
|
||||||
CONFIG_SOC_CPU_HAS_CSR_PC=y
|
CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES=y
|
||||||
CONFIG_SOC_CPU_BREAKPOINTS_NUM=8
|
CONFIG_SOC_CPU_BREAKPOINTS_NUM=2
|
||||||
CONFIG_SOC_CPU_WATCHPOINTS_NUM=8
|
CONFIG_SOC_CPU_WATCHPOINTS_NUM=2
|
||||||
CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=0x80000000
|
CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=64
|
||||||
CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN=3072
|
CONFIG_SOC_SIMD_PREFERRED_DATA_ALIGNMENT=16
|
||||||
|
CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN=4096
|
||||||
CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH=16
|
CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH=16
|
||||||
CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US=1100
|
CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US=1100
|
||||||
CONFIG_SOC_AHB_GDMA_VERSION=1
|
CONFIG_SOC_AHB_GDMA_VERSION=1
|
||||||
CONFIG_SOC_GDMA_NUM_GROUPS_MAX=1
|
CONFIG_SOC_GDMA_NUM_GROUPS_MAX=1
|
||||||
CONFIG_SOC_GDMA_PAIRS_PER_GROUP_MAX=3
|
CONFIG_SOC_GDMA_PAIRS_PER_GROUP=5
|
||||||
|
CONFIG_SOC_GDMA_PAIRS_PER_GROUP_MAX=5
|
||||||
|
CONFIG_SOC_AHB_GDMA_SUPPORT_PSRAM=y
|
||||||
CONFIG_SOC_GPIO_PORT=1
|
CONFIG_SOC_GPIO_PORT=1
|
||||||
CONFIG_SOC_GPIO_PIN_COUNT=22
|
CONFIG_SOC_GPIO_PIN_COUNT=49
|
||||||
CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER=y
|
CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER=y
|
||||||
CONFIG_SOC_GPIO_FILTER_CLK_SUPPORT_APB=y
|
CONFIG_SOC_GPIO_FILTER_CLK_SUPPORT_APB=y
|
||||||
|
CONFIG_SOC_GPIO_SUPPORT_RTC_INDEPENDENT=y
|
||||||
CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD=y
|
CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD=y
|
||||||
CONFIG_SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP=y
|
CONFIG_SOC_GPIO_VALID_GPIO_MASK=0x1FFFFFFFFFFFF
|
||||||
CONFIG_SOC_GPIO_IN_RANGE_MAX=21
|
CONFIG_SOC_GPIO_IN_RANGE_MAX=48
|
||||||
CONFIG_SOC_GPIO_OUT_RANGE_MAX=21
|
CONFIG_SOC_GPIO_OUT_RANGE_MAX=48
|
||||||
CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK=0
|
CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0x0001FFFFFC000000
|
||||||
CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT=6
|
CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX=y
|
||||||
CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0x00000000003FFFC0
|
|
||||||
CONFIG_SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX=y
|
|
||||||
CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM=3
|
CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM=3
|
||||||
CONFIG_SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP=y
|
CONFIG_SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP=y
|
||||||
CONFIG_SOC_DEDIC_GPIO_OUT_CHANNELS_NUM=8
|
CONFIG_SOC_DEDIC_GPIO_OUT_CHANNELS_NUM=8
|
||||||
CONFIG_SOC_DEDIC_GPIO_IN_CHANNELS_NUM=8
|
CONFIG_SOC_DEDIC_GPIO_IN_CHANNELS_NUM=8
|
||||||
CONFIG_SOC_DEDIC_PERIPH_ALWAYS_ENABLE=y
|
CONFIG_SOC_DEDIC_GPIO_OUT_AUTO_ENABLE=y
|
||||||
CONFIG_SOC_I2C_NUM=1
|
CONFIG_SOC_I2C_NUM=2
|
||||||
CONFIG_SOC_HP_I2C_NUM=1
|
CONFIG_SOC_HP_I2C_NUM=2
|
||||||
CONFIG_SOC_I2C_FIFO_LEN=32
|
CONFIG_SOC_I2C_FIFO_LEN=32
|
||||||
CONFIG_SOC_I2C_CMD_REG_NUM=8
|
CONFIG_SOC_I2C_CMD_REG_NUM=8
|
||||||
CONFIG_SOC_I2C_SUPPORT_SLAVE=y
|
CONFIG_SOC_I2C_SUPPORT_SLAVE=y
|
||||||
@ -120,9 +136,9 @@ CONFIG_SOC_I2C_SUPPORT_XTAL=y
|
|||||||
CONFIG_SOC_I2C_SUPPORT_RTC=y
|
CONFIG_SOC_I2C_SUPPORT_RTC=y
|
||||||
CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR=y
|
CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR=y
|
||||||
CONFIG_SOC_I2C_SLAVE_SUPPORT_BROADCAST=y
|
CONFIG_SOC_I2C_SLAVE_SUPPORT_BROADCAST=y
|
||||||
CONFIG_SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE=y
|
|
||||||
CONFIG_SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS=y
|
CONFIG_SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS=y
|
||||||
CONFIG_SOC_I2S_NUM=1
|
CONFIG_SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE=y
|
||||||
|
CONFIG_SOC_I2S_NUM=2
|
||||||
CONFIG_SOC_I2S_HW_VERSION_2=y
|
CONFIG_SOC_I2S_HW_VERSION_2=y
|
||||||
CONFIG_SOC_I2S_SUPPORTS_XTAL=y
|
CONFIG_SOC_I2S_SUPPORTS_XTAL=y
|
||||||
CONFIG_SOC_I2S_SUPPORTS_PLL_F160M=y
|
CONFIG_SOC_I2S_SUPPORTS_PLL_F160M=y
|
||||||
@ -131,52 +147,74 @@ CONFIG_SOC_I2S_SUPPORTS_PDM=y
|
|||||||
CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y
|
CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y
|
||||||
CONFIG_SOC_I2S_SUPPORTS_PCM2PDM=y
|
CONFIG_SOC_I2S_SUPPORTS_PCM2PDM=y
|
||||||
CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y
|
CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y
|
||||||
|
CONFIG_SOC_I2S_SUPPORTS_PDM2PCM=y
|
||||||
CONFIG_SOC_I2S_PDM_MAX_TX_LINES=2
|
CONFIG_SOC_I2S_PDM_MAX_TX_LINES=2
|
||||||
CONFIG_SOC_I2S_PDM_MAX_RX_LINES=1
|
CONFIG_SOC_I2S_PDM_MAX_RX_LINES=4
|
||||||
CONFIG_SOC_I2S_SUPPORTS_TDM=y
|
CONFIG_SOC_I2S_SUPPORTS_TDM=y
|
||||||
CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK=y
|
CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK=y
|
||||||
CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK=y
|
CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK=y
|
||||||
CONFIG_SOC_LEDC_TIMER_NUM=4
|
CONFIG_SOC_LEDC_TIMER_NUM=4
|
||||||
CONFIG_SOC_LEDC_CHANNEL_NUM=6
|
CONFIG_SOC_LEDC_CHANNEL_NUM=8
|
||||||
CONFIG_SOC_LEDC_TIMER_BIT_WIDTH=14
|
CONFIG_SOC_LEDC_TIMER_BIT_WIDTH=14
|
||||||
CONFIG_SOC_LEDC_SUPPORT_FADE_STOP=y
|
CONFIG_SOC_LEDC_SUPPORT_FADE_STOP=y
|
||||||
|
CONFIG_SOC_MCPWM_GROUPS=2
|
||||||
|
CONFIG_SOC_MCPWM_TIMERS_PER_GROUP=3
|
||||||
|
CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP=3
|
||||||
|
CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR=2
|
||||||
|
CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR=2
|
||||||
|
CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR=2
|
||||||
|
CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP=3
|
||||||
|
CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP=y
|
||||||
|
CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER=3
|
||||||
|
CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP=3
|
||||||
|
CONFIG_SOC_MCPWM_SWSYNC_CAN_PROPAGATE=y
|
||||||
CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM=1
|
CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM=1
|
||||||
CONFIG_SOC_MMU_PERIPH_NUM=1
|
CONFIG_SOC_MMU_PERIPH_NUM=1
|
||||||
CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000
|
CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000
|
||||||
CONFIG_SOC_MPU_REGIONS_MAX_NUM=8
|
CONFIG_SOC_MPU_REGIONS_MAX_NUM=8
|
||||||
|
CONFIG_SOC_PCNT_GROUPS=1
|
||||||
|
CONFIG_SOC_PCNT_UNITS_PER_GROUP=4
|
||||||
|
CONFIG_SOC_PCNT_CHANNELS_PER_UNIT=2
|
||||||
|
CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT=2
|
||||||
CONFIG_SOC_RMT_GROUPS=1
|
CONFIG_SOC_RMT_GROUPS=1
|
||||||
CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP=2
|
CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP=4
|
||||||
CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP=2
|
CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP=4
|
||||||
CONFIG_SOC_RMT_CHANNELS_PER_GROUP=4
|
CONFIG_SOC_RMT_CHANNELS_PER_GROUP=8
|
||||||
CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=48
|
CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=48
|
||||||
CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG=y
|
CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG=y
|
||||||
CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION=y
|
CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION=y
|
||||||
CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP=y
|
CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP=y
|
||||||
CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT=y
|
CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT=y
|
||||||
|
CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP=y
|
||||||
CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO=y
|
CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO=y
|
||||||
CONFIG_SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY=y
|
CONFIG_SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY=y
|
||||||
CONFIG_SOC_RMT_SUPPORT_XTAL=y
|
CONFIG_SOC_RMT_SUPPORT_XTAL=y
|
||||||
CONFIG_SOC_RMT_SUPPORT_APB=y
|
|
||||||
CONFIG_SOC_RMT_SUPPORT_RC_FAST=y
|
CONFIG_SOC_RMT_SUPPORT_RC_FAST=y
|
||||||
|
CONFIG_SOC_RMT_SUPPORT_APB=y
|
||||||
|
CONFIG_SOC_RMT_SUPPORT_DMA=y
|
||||||
|
CONFIG_SOC_LCD_I80_SUPPORTED=y
|
||||||
|
CONFIG_SOC_LCD_RGB_SUPPORTED=y
|
||||||
|
CONFIG_SOC_LCD_I80_BUSES=1
|
||||||
|
CONFIG_SOC_LCD_RGB_PANELS=1
|
||||||
|
CONFIG_SOC_LCD_I80_BUS_WIDTH=16
|
||||||
|
CONFIG_SOC_LCD_RGB_DATA_WIDTH=16
|
||||||
|
CONFIG_SOC_LCD_SUPPORT_RGB_YUV_CONV=y
|
||||||
|
CONFIG_SOC_LCDCAM_I80_NUM_BUSES=1
|
||||||
|
CONFIG_SOC_LCDCAM_I80_BUS_WIDTH=16
|
||||||
|
CONFIG_SOC_LCDCAM_RGB_NUM_PANELS=1
|
||||||
|
CONFIG_SOC_LCDCAM_RGB_DATA_WIDTH=16
|
||||||
CONFIG_SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH=128
|
CONFIG_SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH=128
|
||||||
CONFIG_SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM=108
|
CONFIG_SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM=549
|
||||||
CONFIG_SOC_SLEEP_SYSTIMER_STALL_WORKAROUND=y
|
CONFIG_SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH=128
|
||||||
CONFIG_SOC_SLEEP_TGWDT_STOP_WORKAROUND=y
|
CONFIG_SOC_RTCIO_PIN_COUNT=22
|
||||||
CONFIG_SOC_RTCIO_PIN_COUNT=0
|
CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y
|
||||||
CONFIG_SOC_MPI_MEM_BLOCKS_NUM=4
|
CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y
|
||||||
CONFIG_SOC_MPI_OPERATIONS_NUM=3
|
CONFIG_SOC_RTCIO_WAKE_SUPPORTED=y
|
||||||
CONFIG_SOC_RSA_MAX_BIT_LEN=3072
|
CONFIG_SOC_LP_IO_CLOCK_IS_INDEPENDENT=y
|
||||||
CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE=3968
|
CONFIG_SOC_SDM_GROUPS=y
|
||||||
CONFIG_SOC_SHA_SUPPORT_DMA=y
|
CONFIG_SOC_SDM_CHANNELS_PER_GROUP=8
|
||||||
CONFIG_SOC_SHA_SUPPORT_RESUME=y
|
|
||||||
CONFIG_SOC_SHA_GDMA=y
|
|
||||||
CONFIG_SOC_SHA_SUPPORT_SHA1=y
|
|
||||||
CONFIG_SOC_SHA_SUPPORT_SHA224=y
|
|
||||||
CONFIG_SOC_SHA_SUPPORT_SHA256=y
|
|
||||||
CONFIG_SOC_SDM_GROUPS=1
|
|
||||||
CONFIG_SOC_SDM_CHANNELS_PER_GROUP=4
|
|
||||||
CONFIG_SOC_SDM_CLK_SUPPORT_APB=y
|
CONFIG_SOC_SDM_CLK_SUPPORT_APB=y
|
||||||
CONFIG_SOC_SPI_PERIPH_NUM=2
|
CONFIG_SOC_SPI_PERIPH_NUM=3
|
||||||
CONFIG_SOC_SPI_MAX_CS_NUM=6
|
CONFIG_SOC_SPI_MAX_CS_NUM=6
|
||||||
CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64
|
CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64
|
||||||
CONFIG_SOC_SPI_SUPPORT_DDRCLK=y
|
CONFIG_SOC_SPI_SUPPORT_DDRCLK=y
|
||||||
@ -187,24 +225,19 @@ CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2=y
|
|||||||
CONFIG_SOC_SPI_SUPPORT_CLK_APB=y
|
CONFIG_SOC_SPI_SUPPORT_CLK_APB=y
|
||||||
CONFIG_SOC_SPI_SUPPORT_CLK_XTAL=y
|
CONFIG_SOC_SPI_SUPPORT_CLK_XTAL=y
|
||||||
CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT=y
|
CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT=y
|
||||||
|
CONFIG_SOC_MEMSPI_IS_INDEPENDENT=y
|
||||||
|
CONFIG_SOC_SPI_MAX_PRE_DIVIDER=16
|
||||||
|
CONFIG_SOC_SPI_SUPPORT_OCT=y
|
||||||
CONFIG_SOC_SPI_SCT_SUPPORTED=y
|
CONFIG_SOC_SPI_SCT_SUPPORTED=y
|
||||||
CONFIG_SOC_SPI_SCT_REG_NUM=14
|
CONFIG_SOC_SPI_SCT_REG_NUM=14
|
||||||
CONFIG_SOC_SPI_SCT_BUFFER_NUM_MAX=y
|
CONFIG_SOC_SPI_SCT_BUFFER_NUM_MAX=y
|
||||||
CONFIG_SOC_SPI_SCT_CONF_BITLEN_MAX=0x3FFFA
|
CONFIG_SOC_SPI_SCT_CONF_BITLEN_MAX=0x3FFFA
|
||||||
CONFIG_SOC_MEMSPI_IS_INDEPENDENT=y
|
CONFIG_SOC_MEMSPI_SRC_FREQ_120M_SUPPORTED=y
|
||||||
CONFIG_SOC_SPI_MAX_PRE_DIVIDER=16
|
|
||||||
CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE=y
|
|
||||||
CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND=y
|
|
||||||
CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME=y
|
|
||||||
CONFIG_SOC_SPI_MEM_SUPPORT_IDLE_INTR=y
|
|
||||||
CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND=y
|
|
||||||
CONFIG_SOC_SPI_MEM_SUPPORT_CHECK_SUS=y
|
|
||||||
CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE=y
|
|
||||||
CONFIG_SOC_SPI_MEM_SUPPORT_WRAP=y
|
|
||||||
CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y
|
CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y
|
||||||
CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED=y
|
CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED=y
|
||||||
CONFIG_SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED=y
|
|
||||||
CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED=y
|
CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED=y
|
||||||
|
CONFIG_SOC_SPIRAM_SUPPORTED=y
|
||||||
|
CONFIG_SOC_SPIRAM_XIP_SUPPORTED=y
|
||||||
CONFIG_SOC_SYSTIMER_COUNTER_NUM=2
|
CONFIG_SOC_SYSTIMER_COUNTER_NUM=2
|
||||||
CONFIG_SOC_SYSTIMER_ALARM_NUM=3
|
CONFIG_SOC_SYSTIMER_ALARM_NUM=3
|
||||||
CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO=32
|
CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO=32
|
||||||
@ -213,57 +246,75 @@ CONFIG_SOC_SYSTIMER_FIXED_DIVIDER=y
|
|||||||
CONFIG_SOC_SYSTIMER_INT_LEVEL=y
|
CONFIG_SOC_SYSTIMER_INT_LEVEL=y
|
||||||
CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE=y
|
CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE=y
|
||||||
CONFIG_SOC_TIMER_GROUPS=2
|
CONFIG_SOC_TIMER_GROUPS=2
|
||||||
CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP=1
|
CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP=2
|
||||||
CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH=54
|
CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH=54
|
||||||
CONFIG_SOC_TIMER_GROUP_SUPPORT_XTAL=y
|
CONFIG_SOC_TIMER_GROUP_SUPPORT_XTAL=y
|
||||||
CONFIG_SOC_TIMER_GROUP_SUPPORT_APB=y
|
CONFIG_SOC_TIMER_GROUP_SUPPORT_APB=y
|
||||||
CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS=2
|
CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS=4
|
||||||
CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO=32
|
CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO=32
|
||||||
CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI=16
|
CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI=16
|
||||||
CONFIG_SOC_MWDT_SUPPORT_XTAL=y
|
CONFIG_SOC_TOUCH_SENSOR_VERSION=2
|
||||||
|
CONFIG_SOC_TOUCH_SENSOR_NUM=15
|
||||||
|
CONFIG_SOC_TOUCH_MIN_CHAN_ID=y
|
||||||
|
CONFIG_SOC_TOUCH_MAX_CHAN_ID=14
|
||||||
|
CONFIG_SOC_TOUCH_SUPPORT_BENCHMARK=y
|
||||||
|
CONFIG_SOC_TOUCH_SUPPORT_SLEEP_WAKEUP=y
|
||||||
|
CONFIG_SOC_TOUCH_SUPPORT_WATERPROOF=y
|
||||||
|
CONFIG_SOC_TOUCH_SUPPORT_PROX_SENSING=y
|
||||||
|
CONFIG_SOC_TOUCH_SUPPORT_DENOISE_CHAN=y
|
||||||
|
CONFIG_SOC_TOUCH_PROXIMITY_CHANNEL_NUM=3
|
||||||
|
CONFIG_SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED=y
|
||||||
|
CONFIG_SOC_TOUCH_SAMPLE_CFG_NUM=1
|
||||||
CONFIG_SOC_TWAI_CONTROLLER_NUM=1
|
CONFIG_SOC_TWAI_CONTROLLER_NUM=1
|
||||||
CONFIG_SOC_TWAI_CLK_SUPPORT_APB=y
|
CONFIG_SOC_TWAI_CLK_SUPPORT_APB=y
|
||||||
CONFIG_SOC_TWAI_BRP_MIN=2
|
CONFIG_SOC_TWAI_BRP_MIN=2
|
||||||
CONFIG_SOC_TWAI_BRP_MAX=16384
|
CONFIG_SOC_TWAI_BRP_MAX=16384
|
||||||
CONFIG_SOC_TWAI_SUPPORTS_RX_STATUS=y
|
CONFIG_SOC_TWAI_SUPPORTS_RX_STATUS=y
|
||||||
CONFIG_SOC_EFUSE_DIS_DOWNLOAD_ICACHE=y
|
CONFIG_SOC_UART_NUM=3
|
||||||
CONFIG_SOC_EFUSE_DIS_PAD_JTAG=y
|
CONFIG_SOC_UART_HP_NUM=3
|
||||||
CONFIG_SOC_EFUSE_DIS_USB_JTAG=y
|
|
||||||
CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT=y
|
|
||||||
CONFIG_SOC_EFUSE_SOFT_DIS_JTAG=y
|
|
||||||
CONFIG_SOC_EFUSE_DIS_ICACHE=y
|
|
||||||
CONFIG_SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK=y
|
|
||||||
CONFIG_SOC_SECURE_BOOT_V2_RSA=y
|
|
||||||
CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=3
|
|
||||||
CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS=y
|
|
||||||
CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY=y
|
|
||||||
CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=32
|
|
||||||
CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES=y
|
|
||||||
CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128=y
|
|
||||||
CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE=16
|
|
||||||
CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE=512
|
|
||||||
CONFIG_SOC_UART_NUM=2
|
|
||||||
CONFIG_SOC_UART_HP_NUM=2
|
|
||||||
CONFIG_SOC_UART_FIFO_LEN=128
|
CONFIG_SOC_UART_FIFO_LEN=128
|
||||||
CONFIG_SOC_UART_BITRATE_MAX=5000000
|
CONFIG_SOC_UART_BITRATE_MAX=5000000
|
||||||
|
CONFIG_SOC_UART_SUPPORT_FSM_TX_WAIT_SEND=y
|
||||||
|
CONFIG_SOC_UART_SUPPORT_WAKEUP_INT=y
|
||||||
CONFIG_SOC_UART_SUPPORT_APB_CLK=y
|
CONFIG_SOC_UART_SUPPORT_APB_CLK=y
|
||||||
CONFIG_SOC_UART_SUPPORT_RTC_CLK=y
|
CONFIG_SOC_UART_SUPPORT_RTC_CLK=y
|
||||||
CONFIG_SOC_UART_SUPPORT_XTAL_CLK=y
|
CONFIG_SOC_UART_SUPPORT_XTAL_CLK=y
|
||||||
CONFIG_SOC_UART_SUPPORT_WAKEUP_INT=y
|
|
||||||
CONFIG_SOC_UART_SUPPORT_FSM_TX_WAIT_SEND=y
|
|
||||||
CONFIG_SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE=y
|
CONFIG_SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE=y
|
||||||
CONFIG_SOC_COEX_HW_PTI=y
|
CONFIG_SOC_USB_OTG_PERIPH_NUM=1
|
||||||
CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21
|
CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE=3968
|
||||||
CONFIG_SOC_MAC_BB_PD_MEM_SIZE=192
|
CONFIG_SOC_SHA_SUPPORT_DMA=y
|
||||||
CONFIG_SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH=12
|
CONFIG_SOC_SHA_SUPPORT_RESUME=y
|
||||||
|
CONFIG_SOC_SHA_GDMA=y
|
||||||
|
CONFIG_SOC_SHA_SUPPORT_SHA1=y
|
||||||
|
CONFIG_SOC_SHA_SUPPORT_SHA224=y
|
||||||
|
CONFIG_SOC_SHA_SUPPORT_SHA256=y
|
||||||
|
CONFIG_SOC_SHA_SUPPORT_SHA384=y
|
||||||
|
CONFIG_SOC_SHA_SUPPORT_SHA512=y
|
||||||
|
CONFIG_SOC_SHA_SUPPORT_SHA512_224=y
|
||||||
|
CONFIG_SOC_SHA_SUPPORT_SHA512_256=y
|
||||||
|
CONFIG_SOC_SHA_SUPPORT_SHA512_T=y
|
||||||
|
CONFIG_SOC_MPI_MEM_BLOCKS_NUM=4
|
||||||
|
CONFIG_SOC_MPI_OPERATIONS_NUM=3
|
||||||
|
CONFIG_SOC_RSA_MAX_BIT_LEN=4096
|
||||||
|
CONFIG_SOC_AES_SUPPORT_DMA=y
|
||||||
|
CONFIG_SOC_AES_GDMA=y
|
||||||
|
CONFIG_SOC_AES_SUPPORT_AES_128=y
|
||||||
|
CONFIG_SOC_AES_SUPPORT_AES_256=y
|
||||||
|
CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP=y
|
||||||
|
CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP=y
|
||||||
|
CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP=y
|
||||||
CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP=y
|
CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP=y
|
||||||
CONFIG_SOC_PM_SUPPORT_BT_WAKEUP=y
|
CONFIG_SOC_PM_SUPPORT_BT_WAKEUP=y
|
||||||
|
CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y
|
||||||
CONFIG_SOC_PM_SUPPORT_CPU_PD=y
|
CONFIG_SOC_PM_SUPPORT_CPU_PD=y
|
||||||
CONFIG_SOC_PM_SUPPORT_WIFI_PD=y
|
CONFIG_SOC_PM_SUPPORT_TAGMEM_PD=y
|
||||||
CONFIG_SOC_PM_SUPPORT_BT_PD=y
|
CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD=y
|
||||||
CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y
|
CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y
|
||||||
CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD=y
|
CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD=y
|
||||||
CONFIG_SOC_PM_SUPPORT_MAC_BB_PD=y
|
CONFIG_SOC_PM_SUPPORT_MAC_BB_PD=y
|
||||||
|
CONFIG_SOC_PM_SUPPORT_MODEM_PD=y
|
||||||
|
CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED=y
|
||||||
|
CONFIG_SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY=y
|
||||||
CONFIG_SOC_PM_CPU_RETENTION_BY_RTCCNTL=y
|
CONFIG_SOC_PM_CPU_RETENTION_BY_RTCCNTL=y
|
||||||
CONFIG_SOC_PM_MODEM_RETENTION_BY_BACKUPDMA=y
|
CONFIG_SOC_PM_MODEM_RETENTION_BY_BACKUPDMA=y
|
||||||
CONFIG_SOC_PM_MODEM_PD_BY_SW=y
|
CONFIG_SOC_PM_MODEM_PD_BY_SW=y
|
||||||
@ -272,8 +323,46 @@ CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256=y
|
|||||||
CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y
|
CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y
|
||||||
CONFIG_SOC_CLK_XTAL32K_SUPPORTED=y
|
CONFIG_SOC_CLK_XTAL32K_SUPPORTED=y
|
||||||
CONFIG_SOC_CLK_LP_FAST_SUPPORT_XTAL_D2=y
|
CONFIG_SOC_CLK_LP_FAST_SUPPORT_XTAL_D2=y
|
||||||
|
CONFIG_SOC_EFUSE_DIS_DOWNLOAD_ICACHE=y
|
||||||
|
CONFIG_SOC_EFUSE_DIS_DOWNLOAD_DCACHE=y
|
||||||
|
CONFIG_SOC_EFUSE_HARD_DIS_JTAG=y
|
||||||
|
CONFIG_SOC_EFUSE_DIS_USB_JTAG=y
|
||||||
|
CONFIG_SOC_EFUSE_SOFT_DIS_JTAG=y
|
||||||
|
CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT=y
|
||||||
|
CONFIG_SOC_EFUSE_DIS_ICACHE=y
|
||||||
|
CONFIG_SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK=y
|
||||||
|
CONFIG_SOC_SECURE_BOOT_V2_RSA=y
|
||||||
|
CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=3
|
||||||
|
CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS=y
|
||||||
|
CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY=y
|
||||||
|
CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=64
|
||||||
|
CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES=y
|
||||||
|
CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS=y
|
||||||
|
CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128=y
|
||||||
|
CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_256=y
|
||||||
|
CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE=16
|
||||||
|
CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE=256
|
||||||
|
CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21
|
||||||
|
CONFIG_SOC_MAC_BB_PD_MEM_SIZE=192
|
||||||
|
CONFIG_SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH=12
|
||||||
|
CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE=y
|
||||||
|
CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND=y
|
||||||
|
CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME=y
|
||||||
|
CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND=y
|
||||||
|
CONFIG_SOC_SPI_MEM_SUPPORT_OPI_MODE=y
|
||||||
|
CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING=y
|
||||||
|
CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE=y
|
||||||
|
CONFIG_SOC_SPI_MEM_SUPPORT_WRAP=y
|
||||||
|
CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY=y
|
||||||
|
CONFIG_SOC_MEMSPI_CORE_CLK_SHARED_WITH_PSRAM=y
|
||||||
|
CONFIG_SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP=y
|
||||||
|
CONFIG_SOC_COEX_HW_PTI=y
|
||||||
|
CONFIG_SOC_EXTERNAL_COEX_LEADER_TX_LINE=y
|
||||||
|
CONFIG_SOC_SDMMC_USE_GPIO_MATRIX=y
|
||||||
|
CONFIG_SOC_SDMMC_NUM_SLOTS=2
|
||||||
|
CONFIG_SOC_SDMMC_SUPPORT_XTAL_CLOCK=y
|
||||||
|
CONFIG_SOC_SDMMC_DELAY_PHASE_NUM=4
|
||||||
CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC=y
|
CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC=y
|
||||||
CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL=y
|
|
||||||
CONFIG_SOC_WIFI_HW_TSF=y
|
CONFIG_SOC_WIFI_HW_TSF=y
|
||||||
CONFIG_SOC_WIFI_FTM_SUPPORT=y
|
CONFIG_SOC_WIFI_FTM_SUPPORT=y
|
||||||
CONFIG_SOC_WIFI_GCMP_SUPPORT=y
|
CONFIG_SOC_WIFI_GCMP_SUPPORT=y
|
||||||
@ -287,16 +376,17 @@ CONFIG_SOC_BLE_MESH_SUPPORTED=y
|
|||||||
CONFIG_SOC_BLE_50_SUPPORTED=y
|
CONFIG_SOC_BLE_50_SUPPORTED=y
|
||||||
CONFIG_SOC_BLE_DEVICE_PRIVACY_SUPPORTED=y
|
CONFIG_SOC_BLE_DEVICE_PRIVACY_SUPPORTED=y
|
||||||
CONFIG_SOC_BLUFI_SUPPORTED=y
|
CONFIG_SOC_BLUFI_SUPPORTED=y
|
||||||
|
CONFIG_SOC_ULP_HAS_ADC=y
|
||||||
CONFIG_SOC_PHY_COMBO_MODULE=y
|
CONFIG_SOC_PHY_COMBO_MODULE=y
|
||||||
CONFIG_IDF_CMAKE=y
|
CONFIG_IDF_CMAKE=y
|
||||||
CONFIG_IDF_TOOLCHAIN="gcc"
|
CONFIG_IDF_TOOLCHAIN="gcc"
|
||||||
CONFIG_IDF_TOOLCHAIN_GCC=y
|
CONFIG_IDF_TOOLCHAIN_GCC=y
|
||||||
CONFIG_IDF_TARGET_ARCH_RISCV=y
|
CONFIG_IDF_TARGET_ARCH_XTENSA=y
|
||||||
CONFIG_IDF_TARGET_ARCH="riscv"
|
CONFIG_IDF_TARGET_ARCH="xtensa"
|
||||||
CONFIG_IDF_TARGET="esp32c3"
|
CONFIG_IDF_TARGET="esp32s3"
|
||||||
CONFIG_IDF_INIT_VERSION="5.5.0"
|
CONFIG_IDF_INIT_VERSION="5.5.0"
|
||||||
CONFIG_IDF_TARGET_ESP32C3=y
|
CONFIG_IDF_TARGET_ESP32S3=y
|
||||||
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0005
|
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0009
|
||||||
|
|
||||||
#
|
#
|
||||||
# Build type
|
# Build type
|
||||||
@ -366,6 +456,7 @@ CONFIG_BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS=y
|
|||||||
CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y
|
CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y
|
||||||
# end of Serial Flash Configurations
|
# end of Serial Flash Configurations
|
||||||
|
|
||||||
|
CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y
|
||||||
# CONFIG_BOOTLOADER_FACTORY_RESET is not set
|
# CONFIG_BOOTLOADER_FACTORY_RESET is not set
|
||||||
# CONFIG_BOOTLOADER_APP_TEST is not set
|
# CONFIG_BOOTLOADER_APP_TEST is not set
|
||||||
CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y
|
CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y
|
||||||
@ -405,11 +496,13 @@ CONFIG_ESP_ROM_HAS_CRC_BE=y
|
|||||||
CONFIG_ESP_ROM_HAS_MZ_CRC32=y
|
CONFIG_ESP_ROM_HAS_MZ_CRC32=y
|
||||||
CONFIG_ESP_ROM_HAS_JPEG_DECODE=y
|
CONFIG_ESP_ROM_HAS_JPEG_DECODE=y
|
||||||
CONFIG_ESP_ROM_UART_CLK_IS_XTAL=y
|
CONFIG_ESP_ROM_UART_CLK_IS_XTAL=y
|
||||||
CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM=3
|
|
||||||
CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING=y
|
CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING=y
|
||||||
|
CONFIG_ESP_ROM_USB_OTG_NUM=3
|
||||||
|
CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM=4
|
||||||
CONFIG_ESP_ROM_HAS_ERASE_0_REGION_BUG=y
|
CONFIG_ESP_ROM_HAS_ERASE_0_REGION_BUG=y
|
||||||
CONFIG_ESP_ROM_HAS_ENCRYPTED_WRITES_USING_LEGACY_DRV=y
|
CONFIG_ESP_ROM_HAS_ENCRYPTED_WRITES_USING_LEGACY_DRV=y
|
||||||
CONFIG_ESP_ROM_GET_CLK_FREQ=y
|
CONFIG_ESP_ROM_GET_CLK_FREQ=y
|
||||||
|
CONFIG_ESP_ROM_HAS_HAL_WDT=y
|
||||||
CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND=y
|
CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND=y
|
||||||
CONFIG_ESP_ROM_HAS_LAYOUT_TABLE=y
|
CONFIG_ESP_ROM_HAS_LAYOUT_TABLE=y
|
||||||
CONFIG_ESP_ROM_HAS_SPI_FLASH=y
|
CONFIG_ESP_ROM_HAS_SPI_FLASH=y
|
||||||
@ -419,10 +512,13 @@ CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT=y
|
|||||||
CONFIG_ESP_ROM_HAS_NEWLIB_32BIT_TIME=y
|
CONFIG_ESP_ROM_HAS_NEWLIB_32BIT_TIME=y
|
||||||
CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE=y
|
CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE=y
|
||||||
CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT=y
|
CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT=y
|
||||||
|
CONFIG_ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG=y
|
||||||
|
CONFIG_ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG=y
|
||||||
|
CONFIG_ESP_ROM_HAS_CACHE_WRITEBACK_BUG=y
|
||||||
CONFIG_ESP_ROM_HAS_SW_FLOAT=y
|
CONFIG_ESP_ROM_HAS_SW_FLOAT=y
|
||||||
CONFIG_ESP_ROM_USB_OTG_NUM=-1
|
|
||||||
CONFIG_ESP_ROM_HAS_VERSION=y
|
CONFIG_ESP_ROM_HAS_VERSION=y
|
||||||
CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB=y
|
CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB=y
|
||||||
|
CONFIG_ESP_ROM_HAS_OUTPUT_PUTC_FUNC=y
|
||||||
CONFIG_ESP_ROM_CONSOLE_OUTPUT_SECONDARY=y
|
CONFIG_ESP_ROM_CONSOLE_OUTPUT_SECONDARY=y
|
||||||
|
|
||||||
#
|
#
|
||||||
@ -438,26 +534,28 @@ CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y
|
|||||||
# Serial flasher config
|
# Serial flasher config
|
||||||
#
|
#
|
||||||
# CONFIG_ESPTOOLPY_NO_STUB is not set
|
# CONFIG_ESPTOOLPY_NO_STUB is not set
|
||||||
|
# CONFIG_ESPTOOLPY_OCT_FLASH is not set
|
||||||
|
CONFIG_ESPTOOLPY_FLASH_MODE_AUTO_DETECT=y
|
||||||
# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set
|
# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set
|
||||||
# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set
|
# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set
|
||||||
CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
|
CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
|
||||||
# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set
|
# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set
|
||||||
CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y
|
CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y
|
||||||
CONFIG_ESPTOOLPY_FLASHMODE="dio"
|
CONFIG_ESPTOOLPY_FLASHMODE="dio"
|
||||||
|
# CONFIG_ESPTOOLPY_FLASHFREQ_120M is not set
|
||||||
CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
|
CONFIG_ESPTOOLPY_FLASHFREQ_80M=y
|
||||||
# CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set
|
# CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set
|
||||||
# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set
|
|
||||||
# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set
|
# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set
|
||||||
CONFIG_ESPTOOLPY_FLASHFREQ="80m"
|
CONFIG_ESPTOOLPY_FLASHFREQ="80m"
|
||||||
# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
|
# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
|
||||||
# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
|
CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y
|
||||||
CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
|
# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set
|
||||||
# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
|
# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
|
||||||
# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
|
# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set
|
||||||
# CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set
|
# CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set
|
||||||
# CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set
|
# CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set
|
||||||
# CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set
|
# CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set
|
||||||
CONFIG_ESPTOOLPY_FLASHSIZE="4MB"
|
CONFIG_ESPTOOLPY_FLASHSIZE="2MB"
|
||||||
# CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set
|
# CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set
|
||||||
CONFIG_ESPTOOLPY_BEFORE_RESET=y
|
CONFIG_ESPTOOLPY_BEFORE_RESET=y
|
||||||
# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set
|
# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set
|
||||||
@ -505,7 +603,6 @@ CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
|
|||||||
# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
|
# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
|
||||||
# CONFIG_COMPILER_NO_MERGE_CONSTANTS is not set
|
# CONFIG_COMPILER_NO_MERGE_CONSTANTS is not set
|
||||||
# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set
|
# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set
|
||||||
# CONFIG_COMPILER_SAVE_RESTORE_LIBCALLS is not set
|
|
||||||
CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS=y
|
CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS=y
|
||||||
# CONFIG_COMPILER_DISABLE_GCC12_WARNINGS is not set
|
# CONFIG_COMPILER_DISABLE_GCC12_WARNINGS is not set
|
||||||
# CONFIG_COMPILER_DISABLE_GCC13_WARNINGS is not set
|
# CONFIG_COMPILER_DISABLE_GCC13_WARNINGS is not set
|
||||||
@ -528,6 +625,7 @@ CONFIG_COMPILER_ORPHAN_SECTIONS_WARNING=y
|
|||||||
# CONFIG_APPTRACE_DEST_JTAG is not set
|
# CONFIG_APPTRACE_DEST_JTAG is not set
|
||||||
CONFIG_APPTRACE_DEST_NONE=y
|
CONFIG_APPTRACE_DEST_NONE=y
|
||||||
# CONFIG_APPTRACE_DEST_UART1 is not set
|
# CONFIG_APPTRACE_DEST_UART1 is not set
|
||||||
|
# CONFIG_APPTRACE_DEST_UART2 is not set
|
||||||
# CONFIG_APPTRACE_DEST_USB_CDC is not set
|
# CONFIG_APPTRACE_DEST_USB_CDC is not set
|
||||||
CONFIG_APPTRACE_DEST_UART_NONE=y
|
CONFIG_APPTRACE_DEST_UART_NONE=y
|
||||||
CONFIG_APPTRACE_UART_TASK_PRIO=1
|
CONFIG_APPTRACE_UART_TASK_PRIO=1
|
||||||
@ -576,6 +674,13 @@ CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM=y
|
|||||||
# end of Legacy ADC Calibration Configuration
|
# end of Legacy ADC Calibration Configuration
|
||||||
# end of Legacy ADC Driver Configuration
|
# end of Legacy ADC Driver Configuration
|
||||||
|
|
||||||
|
#
|
||||||
|
# Legacy MCPWM Driver Configurations
|
||||||
|
#
|
||||||
|
# CONFIG_MCPWM_SUPPRESS_DEPRECATE_WARN is not set
|
||||||
|
# CONFIG_MCPWM_SKIP_LEGACY_CONFLICT_CHECK is not set
|
||||||
|
# end of Legacy MCPWM Driver Configurations
|
||||||
|
|
||||||
#
|
#
|
||||||
# Legacy Timer Group Driver Configurations
|
# Legacy Timer Group Driver Configurations
|
||||||
#
|
#
|
||||||
@ -603,6 +708,13 @@ CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM=y
|
|||||||
# CONFIG_I2C_SKIP_LEGACY_CONFLICT_CHECK is not set
|
# CONFIG_I2C_SKIP_LEGACY_CONFLICT_CHECK is not set
|
||||||
# end of Legacy I2C Driver Configurations
|
# end of Legacy I2C Driver Configurations
|
||||||
|
|
||||||
|
#
|
||||||
|
# Legacy PCNT Driver Configurations
|
||||||
|
#
|
||||||
|
# CONFIG_PCNT_SUPPRESS_DEPRECATE_WARN is not set
|
||||||
|
# CONFIG_PCNT_SKIP_LEGACY_CONFLICT_CHECK is not set
|
||||||
|
# end of Legacy PCNT Driver Configurations
|
||||||
|
|
||||||
#
|
#
|
||||||
# Legacy SDM Driver Configurations
|
# Legacy SDM Driver Configurations
|
||||||
#
|
#
|
||||||
@ -616,6 +728,13 @@ CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM=y
|
|||||||
# CONFIG_TEMP_SENSOR_SUPPRESS_DEPRECATE_WARN is not set
|
# CONFIG_TEMP_SENSOR_SUPPRESS_DEPRECATE_WARN is not set
|
||||||
# CONFIG_TEMP_SENSOR_SKIP_LEGACY_CONFLICT_CHECK is not set
|
# CONFIG_TEMP_SENSOR_SKIP_LEGACY_CONFLICT_CHECK is not set
|
||||||
# end of Legacy Temperature Sensor Driver Configurations
|
# end of Legacy Temperature Sensor Driver Configurations
|
||||||
|
|
||||||
|
#
|
||||||
|
# Legacy Touch Sensor Driver Configurations
|
||||||
|
#
|
||||||
|
# CONFIG_TOUCH_SUPPRESS_DEPRECATE_WARN is not set
|
||||||
|
# CONFIG_TOUCH_SKIP_LEGACY_CONFLICT_CHECK is not set
|
||||||
|
# end of Legacy Touch Sensor Driver Configurations
|
||||||
# end of Driver Configurations
|
# end of Driver Configurations
|
||||||
|
|
||||||
#
|
#
|
||||||
@ -646,7 +765,6 @@ CONFIG_ESP_TLS_USE_DS_PERIPHERAL=y
|
|||||||
# CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM is not set
|
# CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM is not set
|
||||||
# CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE is not set
|
# CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE is not set
|
||||||
# CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3 is not set
|
# CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3 is not set
|
||||||
# CONFIG_ADC_ONESHOT_FORCE_USE_ADC2_ON_C3 is not set
|
|
||||||
# CONFIG_ADC_ENABLE_DEBUG_LOG is not set
|
# CONFIG_ADC_ENABLE_DEBUG_LOG is not set
|
||||||
# end of ADC and ADC Calibration
|
# end of ADC and ADC Calibration
|
||||||
|
|
||||||
@ -702,6 +820,22 @@ CONFIG_I2C_MASTER_ISR_HANDLER_IN_IRAM=y
|
|||||||
# CONFIG_LEDC_CTRL_FUNC_IN_IRAM is not set
|
# CONFIG_LEDC_CTRL_FUNC_IN_IRAM is not set
|
||||||
# end of ESP-Driver:LEDC Configurations
|
# end of ESP-Driver:LEDC Configurations
|
||||||
|
|
||||||
|
#
|
||||||
|
# ESP-Driver:MCPWM Configurations
|
||||||
|
#
|
||||||
|
# CONFIG_MCPWM_ISR_IRAM_SAFE is not set
|
||||||
|
# CONFIG_MCPWM_CTRL_FUNC_IN_IRAM is not set
|
||||||
|
# CONFIG_MCPWM_ENABLE_DEBUG_LOG is not set
|
||||||
|
# end of ESP-Driver:MCPWM Configurations
|
||||||
|
|
||||||
|
#
|
||||||
|
# ESP-Driver:PCNT Configurations
|
||||||
|
#
|
||||||
|
# CONFIG_PCNT_CTRL_FUNC_IN_IRAM is not set
|
||||||
|
# CONFIG_PCNT_ISR_IRAM_SAFE is not set
|
||||||
|
# CONFIG_PCNT_ENABLE_DEBUG_LOG is not set
|
||||||
|
# end of ESP-Driver:PCNT Configurations
|
||||||
|
|
||||||
#
|
#
|
||||||
# ESP-Driver:RMT Configurations
|
# ESP-Driver:RMT Configurations
|
||||||
#
|
#
|
||||||
@ -728,6 +862,15 @@ CONFIG_SPI_MASTER_ISR_IN_IRAM=y
|
|||||||
CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
|
CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
|
||||||
# end of ESP-Driver:SPI Configurations
|
# end of ESP-Driver:SPI Configurations
|
||||||
|
|
||||||
|
#
|
||||||
|
# ESP-Driver:Touch Sensor Configurations
|
||||||
|
#
|
||||||
|
# CONFIG_TOUCH_CTRL_FUNC_IN_IRAM is not set
|
||||||
|
# CONFIG_TOUCH_ISR_IRAM_SAFE is not set
|
||||||
|
# CONFIG_TOUCH_ENABLE_DEBUG_LOG is not set
|
||||||
|
# CONFIG_TOUCH_SKIP_FSM_CHECK is not set
|
||||||
|
# end of ESP-Driver:Touch Sensor Configurations
|
||||||
|
|
||||||
#
|
#
|
||||||
# ESP-Driver:Temperature Sensor Configurations
|
# ESP-Driver:Temperature Sensor Configurations
|
||||||
#
|
#
|
||||||
@ -828,25 +971,22 @@ CONFIG_ESP_HTTPS_SERVER_EVENT_POST_TIMEOUT=2000
|
|||||||
#
|
#
|
||||||
# Chip revision
|
# Chip revision
|
||||||
#
|
#
|
||||||
# CONFIG_ESP32C3_REV_MIN_0 is not set
|
CONFIG_ESP32S3_REV_MIN_0=y
|
||||||
# CONFIG_ESP32C3_REV_MIN_1 is not set
|
# CONFIG_ESP32S3_REV_MIN_1 is not set
|
||||||
# CONFIG_ESP32C3_REV_MIN_2 is not set
|
# CONFIG_ESP32S3_REV_MIN_2 is not set
|
||||||
CONFIG_ESP32C3_REV_MIN_3=y
|
CONFIG_ESP32S3_REV_MIN_FULL=0
|
||||||
# CONFIG_ESP32C3_REV_MIN_4 is not set
|
CONFIG_ESP_REV_MIN_FULL=0
|
||||||
# CONFIG_ESP32C3_REV_MIN_101 is not set
|
|
||||||
CONFIG_ESP32C3_REV_MIN_FULL=3
|
|
||||||
CONFIG_ESP_REV_MIN_FULL=3
|
|
||||||
|
|
||||||
#
|
#
|
||||||
# Maximum Supported ESP32-C3 Revision (Rev v1.99)
|
# Maximum Supported ESP32-S3 Revision (Rev v0.99)
|
||||||
#
|
#
|
||||||
CONFIG_ESP32C3_REV_MAX_FULL=199
|
CONFIG_ESP32S3_REV_MAX_FULL=99
|
||||||
CONFIG_ESP_REV_MAX_FULL=199
|
CONFIG_ESP_REV_MAX_FULL=99
|
||||||
CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL=0
|
CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL=0
|
||||||
CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL=199
|
CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL=199
|
||||||
|
|
||||||
#
|
#
|
||||||
# Maximum Supported ESP32-C3 eFuse Block Revision (eFuse Block Rev v1.99)
|
# Maximum Supported ESP32-S3 eFuse Block Revision (eFuse Block Rev v1.99)
|
||||||
#
|
#
|
||||||
# end of Chip revision
|
# end of Chip revision
|
||||||
|
|
||||||
@ -859,9 +999,9 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y
|
|||||||
CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y
|
CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y
|
||||||
CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR=y
|
CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR=y
|
||||||
CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES=4
|
CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES=4
|
||||||
# CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO is not set
|
# CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO is not set
|
||||||
CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR=y
|
CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR=y
|
||||||
CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=4
|
CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES=4
|
||||||
# CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC is not set
|
# CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC is not set
|
||||||
# end of MAC Config
|
# end of MAC Config
|
||||||
|
|
||||||
@ -870,9 +1010,10 @@ CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES=4
|
|||||||
#
|
#
|
||||||
# CONFIG_ESP_SLEEP_POWER_DOWN_FLASH is not set
|
# CONFIG_ESP_SLEEP_POWER_DOWN_FLASH is not set
|
||||||
CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y
|
CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y
|
||||||
# CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU is not set
|
CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU=y
|
||||||
|
CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y
|
||||||
CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND=y
|
CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND=y
|
||||||
CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=0
|
CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=2000
|
||||||
# CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION is not set
|
# CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION is not set
|
||||||
# CONFIG_ESP_SLEEP_DEBUG is not set
|
# CONFIG_ESP_SLEEP_DEBUG is not set
|
||||||
CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS=y
|
CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS=y
|
||||||
@ -924,6 +1065,7 @@ CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7=y
|
|||||||
# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4 is not set
|
# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4 is not set
|
||||||
# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3 is not set
|
# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3 is not set
|
||||||
# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2 is not set
|
# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2 is not set
|
||||||
|
# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_1 is not set
|
||||||
CONFIG_ESP_BROWNOUT_DET_LVL=7
|
CONFIG_ESP_BROWNOUT_DET_LVL=7
|
||||||
CONFIG_ESP_BROWNOUT_USE_INTR=y
|
CONFIG_ESP_BROWNOUT_USE_INTR=y
|
||||||
# end of Brownout Detector
|
# end of Brownout Detector
|
||||||
@ -936,11 +1078,14 @@ CONFIG_ESP_SPI_BUS_LOCK_ISR_FUNCS_IN_IRAM=y
|
|||||||
# ESP-Driver:LCD Controller Configurations
|
# ESP-Driver:LCD Controller Configurations
|
||||||
#
|
#
|
||||||
# CONFIG_LCD_ENABLE_DEBUG_LOG is not set
|
# CONFIG_LCD_ENABLE_DEBUG_LOG is not set
|
||||||
|
# CONFIG_LCD_RGB_ISR_IRAM_SAFE is not set
|
||||||
|
# CONFIG_LCD_RGB_RESTART_IN_VSYNC is not set
|
||||||
# end of ESP-Driver:LCD Controller Configurations
|
# end of ESP-Driver:LCD Controller Configurations
|
||||||
|
|
||||||
#
|
#
|
||||||
# ESP-MM: Memory Management Configurations
|
# ESP-MM: Memory Management Configurations
|
||||||
#
|
#
|
||||||
|
# CONFIG_ESP_MM_CACHE_MSYNC_C2M_CHUNKED_OPS is not set
|
||||||
# end of ESP-MM: Memory Management Configurations
|
# end of ESP-MM: Memory Management Configurations
|
||||||
|
|
||||||
#
|
#
|
||||||
@ -988,11 +1133,14 @@ CONFIG_ESP_PHY_CALIBRATION_MODE=0
|
|||||||
# CONFIG_PM_ENABLE is not set
|
# CONFIG_PM_ENABLE is not set
|
||||||
# CONFIG_PM_SLP_IRAM_OPT is not set
|
# CONFIG_PM_SLP_IRAM_OPT is not set
|
||||||
CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y
|
CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y
|
||||||
|
CONFIG_PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP=y
|
||||||
# end of Power Management
|
# end of Power Management
|
||||||
|
|
||||||
#
|
#
|
||||||
# ESP PSRAM
|
# ESP PSRAM
|
||||||
#
|
#
|
||||||
|
# CONFIG_SPIRAM is not set
|
||||||
|
# end of ESP PSRAM
|
||||||
|
|
||||||
#
|
#
|
||||||
# ESP Ringbuf
|
# ESP Ringbuf
|
||||||
@ -1010,18 +1158,55 @@ CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y
|
|||||||
#
|
#
|
||||||
# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
|
# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set
|
||||||
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
|
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y
|
||||||
|
# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set
|
||||||
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
|
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160
|
||||||
|
|
||||||
|
#
|
||||||
|
# Cache config
|
||||||
|
#
|
||||||
|
CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB=y
|
||||||
|
# CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB is not set
|
||||||
|
CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE=0x4000
|
||||||
|
# CONFIG_ESP32S3_INSTRUCTION_CACHE_4WAYS is not set
|
||||||
|
CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS=y
|
||||||
|
CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS=8
|
||||||
|
# CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_16B is not set
|
||||||
|
CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B=y
|
||||||
|
CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE=32
|
||||||
|
# CONFIG_ESP32S3_DATA_CACHE_16KB is not set
|
||||||
|
CONFIG_ESP32S3_DATA_CACHE_32KB=y
|
||||||
|
# CONFIG_ESP32S3_DATA_CACHE_64KB is not set
|
||||||
|
CONFIG_ESP32S3_DATA_CACHE_SIZE=0x8000
|
||||||
|
# CONFIG_ESP32S3_DATA_CACHE_4WAYS is not set
|
||||||
|
CONFIG_ESP32S3_DATA_CACHE_8WAYS=y
|
||||||
|
CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS=8
|
||||||
|
# CONFIG_ESP32S3_DATA_CACHE_LINE_16B is not set
|
||||||
|
CONFIG_ESP32S3_DATA_CACHE_LINE_32B=y
|
||||||
|
# CONFIG_ESP32S3_DATA_CACHE_LINE_64B is not set
|
||||||
|
CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE=32
|
||||||
|
# end of Cache config
|
||||||
|
|
||||||
|
#
|
||||||
|
# Memory
|
||||||
|
#
|
||||||
|
# CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set
|
||||||
|
# CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set
|
||||||
|
# end of Memory
|
||||||
|
|
||||||
|
#
|
||||||
|
# Trace memory
|
||||||
|
#
|
||||||
|
# CONFIG_ESP32S3_TRAX is not set
|
||||||
|
CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM=0x0
|
||||||
|
# end of Trace memory
|
||||||
|
|
||||||
# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set
|
# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set
|
||||||
CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y
|
CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y
|
||||||
# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
|
# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
|
||||||
# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set
|
# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set
|
||||||
CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS=0
|
CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS=0
|
||||||
CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=y
|
|
||||||
CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y
|
CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y
|
||||||
CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y
|
CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y
|
||||||
CONFIG_ESP_SYSTEM_NO_BACKTRACE=y
|
|
||||||
# CONFIG_ESP_SYSTEM_USE_EH_FRAME is not set
|
|
||||||
# CONFIG_ESP_SYSTEM_USE_FRAME_POINTER is not set
|
|
||||||
|
|
||||||
#
|
#
|
||||||
# Memory protection
|
# Memory protection
|
||||||
@ -1034,10 +1219,12 @@ CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32
|
|||||||
CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304
|
CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304
|
||||||
CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584
|
CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584
|
||||||
CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y
|
CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y
|
||||||
|
# CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set
|
||||||
# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set
|
# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set
|
||||||
CONFIG_ESP_MAIN_TASK_AFFINITY=0x0
|
CONFIG_ESP_MAIN_TASK_AFFINITY=0x0
|
||||||
CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048
|
CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048
|
||||||
CONFIG_ESP_CONSOLE_UART_DEFAULT=y
|
CONFIG_ESP_CONSOLE_UART_DEFAULT=y
|
||||||
|
# CONFIG_ESP_CONSOLE_USB_CDC is not set
|
||||||
# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG is not set
|
# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG is not set
|
||||||
# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
|
# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
|
||||||
# CONFIG_ESP_CONSOLE_NONE is not set
|
# CONFIG_ESP_CONSOLE_NONE is not set
|
||||||
@ -1050,23 +1237,26 @@ CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM=0
|
|||||||
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
|
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
|
||||||
CONFIG_ESP_INT_WDT=y
|
CONFIG_ESP_INT_WDT=y
|
||||||
CONFIG_ESP_INT_WDT_TIMEOUT_MS=300
|
CONFIG_ESP_INT_WDT_TIMEOUT_MS=300
|
||||||
|
CONFIG_ESP_INT_WDT_CHECK_CPU1=y
|
||||||
CONFIG_ESP_TASK_WDT_EN=y
|
CONFIG_ESP_TASK_WDT_EN=y
|
||||||
CONFIG_ESP_TASK_WDT_INIT=y
|
CONFIG_ESP_TASK_WDT_INIT=y
|
||||||
# CONFIG_ESP_TASK_WDT_PANIC is not set
|
# CONFIG_ESP_TASK_WDT_PANIC is not set
|
||||||
CONFIG_ESP_TASK_WDT_TIMEOUT_S=5
|
CONFIG_ESP_TASK_WDT_TIMEOUT_S=5
|
||||||
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
|
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
|
||||||
|
CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y
|
||||||
# CONFIG_ESP_PANIC_HANDLER_IRAM is not set
|
# CONFIG_ESP_PANIC_HANDLER_IRAM is not set
|
||||||
# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set
|
# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set
|
||||||
CONFIG_ESP_DEBUG_OCDAWARE=y
|
CONFIG_ESP_DEBUG_OCDAWARE=y
|
||||||
CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
|
CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
|
||||||
CONFIG_ESP_SYSTEM_HW_STACK_GUARD=y
|
CONFIG_ESP_SYSTEM_BBPLL_RECALIB=y
|
||||||
CONFIG_ESP_SYSTEM_HW_PC_RECORD=y
|
|
||||||
# end of ESP System Settings
|
# end of ESP System Settings
|
||||||
|
|
||||||
#
|
#
|
||||||
# IPC (Inter-Processor Call)
|
# IPC (Inter-Processor Call)
|
||||||
#
|
#
|
||||||
CONFIG_ESP_IPC_TASK_STACK_SIZE=1024
|
CONFIG_ESP_IPC_TASK_STACK_SIZE=1280
|
||||||
|
CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y
|
||||||
|
CONFIG_ESP_IPC_ISR_ENABLE=y
|
||||||
# end of IPC (Inter-Processor Call)
|
# end of IPC (Inter-Processor Call)
|
||||||
|
|
||||||
#
|
#
|
||||||
@ -1105,6 +1295,8 @@ CONFIG_ESP_WIFI_TX_BA_WIN=6
|
|||||||
CONFIG_ESP_WIFI_AMPDU_RX_ENABLED=y
|
CONFIG_ESP_WIFI_AMPDU_RX_ENABLED=y
|
||||||
CONFIG_ESP_WIFI_RX_BA_WIN=6
|
CONFIG_ESP_WIFI_RX_BA_WIN=6
|
||||||
CONFIG_ESP_WIFI_NVS_ENABLED=y
|
CONFIG_ESP_WIFI_NVS_ENABLED=y
|
||||||
|
CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0=y
|
||||||
|
# CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_1 is not set
|
||||||
CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN=752
|
CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN=752
|
||||||
CONFIG_ESP_WIFI_MGMT_SBUF_NUM=32
|
CONFIG_ESP_WIFI_MGMT_SBUF_NUM=32
|
||||||
CONFIG_ESP_WIFI_IRAM_OPT=y
|
CONFIG_ESP_WIFI_IRAM_OPT=y
|
||||||
@ -1209,9 +1401,8 @@ CONFIG_FATFS_LINK_LOCK=y
|
|||||||
# Kernel
|
# Kernel
|
||||||
#
|
#
|
||||||
# CONFIG_FREERTOS_SMP is not set
|
# CONFIG_FREERTOS_SMP is not set
|
||||||
CONFIG_FREERTOS_UNICORE=y
|
# CONFIG_FREERTOS_UNICORE is not set
|
||||||
CONFIG_FREERTOS_HZ=100
|
CONFIG_FREERTOS_HZ=100
|
||||||
CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=y
|
|
||||||
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
|
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
|
||||||
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
|
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
|
||||||
CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y
|
CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y
|
||||||
@ -1224,6 +1415,7 @@ CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16
|
|||||||
CONFIG_FREERTOS_USE_TIMERS=y
|
CONFIG_FREERTOS_USE_TIMERS=y
|
||||||
CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME="Tmr Svc"
|
CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME="Tmr Svc"
|
||||||
# CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU0 is not set
|
# CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU0 is not set
|
||||||
|
# CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU1 is not set
|
||||||
CONFIG_FREERTOS_TIMER_TASK_NO_AFFINITY=y
|
CONFIG_FREERTOS_TIMER_TASK_NO_AFFINITY=y
|
||||||
CONFIG_FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY=0x7FFFFFFF
|
CONFIG_FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY=0x7FFFFFFF
|
||||||
CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1
|
CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1
|
||||||
@ -1248,6 +1440,7 @@ CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS=y
|
|||||||
CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
|
CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
|
||||||
CONFIG_FREERTOS_ISR_STACKSIZE=1536
|
CONFIG_FREERTOS_ISR_STACKSIZE=1536
|
||||||
CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y
|
CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y
|
||||||
|
# CONFIG_FREERTOS_FPU_IN_ISR is not set
|
||||||
CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER=y
|
CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER=y
|
||||||
CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y
|
CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y
|
||||||
# CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set
|
# CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set
|
||||||
@ -1267,7 +1460,7 @@ CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
|
|||||||
CONFIG_FREERTOS_DEBUG_OCDAWARE=y
|
CONFIG_FREERTOS_DEBUG_OCDAWARE=y
|
||||||
CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y
|
CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y
|
||||||
CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH=y
|
CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH=y
|
||||||
CONFIG_FREERTOS_NUMBER_OF_CORES=1
|
CONFIG_FREERTOS_NUMBER_OF_CORES=2
|
||||||
# end of FreeRTOS
|
# end of FreeRTOS
|
||||||
|
|
||||||
#
|
#
|
||||||
@ -1278,6 +1471,7 @@ CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y
|
|||||||
# CONFIG_HAL_ASSERTION_SILENT is not set
|
# CONFIG_HAL_ASSERTION_SILENT is not set
|
||||||
# CONFIG_HAL_ASSERTION_ENABLE is not set
|
# CONFIG_HAL_ASSERTION_ENABLE is not set
|
||||||
CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2
|
CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2
|
||||||
|
CONFIG_HAL_WDT_USE_ROM_IMPL=y
|
||||||
# end of Hardware Abstraction Layer (HAL) and Low Level (LL)
|
# end of Hardware Abstraction Layer (HAL) and Low Level (LL)
|
||||||
|
|
||||||
#
|
#
|
||||||
@ -1449,6 +1643,7 @@ CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y
|
|||||||
CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072
|
CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072
|
||||||
CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
|
CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
|
||||||
# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set
|
# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set
|
||||||
|
# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set
|
||||||
CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF
|
CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF
|
||||||
CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3
|
CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3
|
||||||
CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5
|
CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5
|
||||||
@ -1565,7 +1760,7 @@ CONFIG_MBEDTLS_AES_USE_INTERRUPT=y
|
|||||||
CONFIG_MBEDTLS_AES_INTERRUPT_LEVEL=0
|
CONFIG_MBEDTLS_AES_INTERRUPT_LEVEL=0
|
||||||
CONFIG_MBEDTLS_GCM_SUPPORT_NON_AES_CIPHER=y
|
CONFIG_MBEDTLS_GCM_SUPPORT_NON_AES_CIPHER=y
|
||||||
CONFIG_MBEDTLS_HARDWARE_MPI=y
|
CONFIG_MBEDTLS_HARDWARE_MPI=y
|
||||||
CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI=y
|
# CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set
|
||||||
CONFIG_MBEDTLS_MPI_USE_INTERRUPT=y
|
CONFIG_MBEDTLS_MPI_USE_INTERRUPT=y
|
||||||
CONFIG_MBEDTLS_MPI_INTERRUPT_LEVEL=0
|
CONFIG_MBEDTLS_MPI_INTERRUPT_LEVEL=0
|
||||||
CONFIG_MBEDTLS_HARDWARE_SHA=y
|
CONFIG_MBEDTLS_HARDWARE_SHA=y
|
||||||
@ -1728,6 +1923,9 @@ CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_PATCH_VERSION=y
|
|||||||
CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5
|
CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5
|
||||||
CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
|
CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
|
||||||
CONFIG_PTHREAD_STACK_MIN=768
|
CONFIG_PTHREAD_STACK_MIN=768
|
||||||
|
CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y
|
||||||
|
# CONFIG_PTHREAD_DEFAULT_CORE_0 is not set
|
||||||
|
# CONFIG_PTHREAD_DEFAULT_CORE_1 is not set
|
||||||
CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1
|
CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1
|
||||||
CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
|
CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
|
||||||
# end of PThreads
|
# end of PThreads
|
||||||
@ -1758,6 +1956,12 @@ CONFIG_SPI_FLASH_BROWNOUT_RESET=y
|
|||||||
#
|
#
|
||||||
# Features here require specific hardware (READ DOCS FIRST!)
|
# Features here require specific hardware (READ DOCS FIRST!)
|
||||||
#
|
#
|
||||||
|
# CONFIG_SPI_FLASH_HPM_ENA is not set
|
||||||
|
CONFIG_SPI_FLASH_HPM_AUTO=y
|
||||||
|
# CONFIG_SPI_FLASH_HPM_DIS is not set
|
||||||
|
CONFIG_SPI_FLASH_HPM_ON=y
|
||||||
|
CONFIG_SPI_FLASH_HPM_DC_AUTO=y
|
||||||
|
# CONFIG_SPI_FLASH_HPM_DC_DISABLE is not set
|
||||||
# CONFIG_SPI_FLASH_AUTO_SUSPEND is not set
|
# CONFIG_SPI_FLASH_AUTO_SUSPEND is not set
|
||||||
CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US=50
|
CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US=50
|
||||||
# CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND is not set
|
# CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND is not set
|
||||||
@ -1801,6 +2005,7 @@ CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
|
|||||||
CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
|
CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
|
||||||
CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y
|
CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y
|
||||||
CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y
|
CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y
|
||||||
|
CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP=y
|
||||||
# end of Auto-detect flash chips
|
# end of Auto-detect flash chips
|
||||||
|
|
||||||
CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y
|
CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y
|
||||||
@ -1855,6 +2060,17 @@ CONFIG_WS_BUFFER_SIZE=1024
|
|||||||
# end of Websocket
|
# end of Websocket
|
||||||
# end of TCP Transport
|
# end of TCP Transport
|
||||||
|
|
||||||
|
#
|
||||||
|
# Ultra Low Power (ULP) Co-processor
|
||||||
|
#
|
||||||
|
# CONFIG_ULP_COPROC_ENABLED is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# ULP Debugging Options
|
||||||
|
#
|
||||||
|
# end of ULP Debugging Options
|
||||||
|
# end of Ultra Low Power (ULP) Co-processor
|
||||||
|
|
||||||
#
|
#
|
||||||
# Unity unit testing library
|
# Unity unit testing library
|
||||||
#
|
#
|
||||||
@ -1867,6 +2083,34 @@ CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y
|
|||||||
# CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set
|
# CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set
|
||||||
# end of Unity unit testing library
|
# end of Unity unit testing library
|
||||||
|
|
||||||
|
#
|
||||||
|
# USB-OTG
|
||||||
|
#
|
||||||
|
CONFIG_USB_HOST_CONTROL_TRANSFER_MAX_SIZE=256
|
||||||
|
CONFIG_USB_HOST_HW_BUFFER_BIAS_BALANCED=y
|
||||||
|
# CONFIG_USB_HOST_HW_BUFFER_BIAS_IN is not set
|
||||||
|
# CONFIG_USB_HOST_HW_BUFFER_BIAS_PERIODIC_OUT is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Hub Driver Configuration
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Root Port configuration
|
||||||
|
#
|
||||||
|
CONFIG_USB_HOST_DEBOUNCE_DELAY_MS=250
|
||||||
|
CONFIG_USB_HOST_RESET_HOLD_MS=30
|
||||||
|
CONFIG_USB_HOST_RESET_RECOVERY_MS=30
|
||||||
|
CONFIG_USB_HOST_SET_ADDR_RECOVERY_MS=10
|
||||||
|
# end of Root Port configuration
|
||||||
|
|
||||||
|
# CONFIG_USB_HOST_HUBS_SUPPORTED is not set
|
||||||
|
# end of Hub Driver Configuration
|
||||||
|
|
||||||
|
# CONFIG_USB_HOST_ENABLE_ENUM_FILTER_CALLBACK is not set
|
||||||
|
CONFIG_USB_OTG_SUPPORTED=y
|
||||||
|
# end of USB-OTG
|
||||||
|
|
||||||
#
|
#
|
||||||
# Virtual file system
|
# Virtual file system
|
||||||
#
|
#
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user